Generic Packet Status Register
| GEN_CMD_EMPTY | This bit indicates the empty status of the generic command FIFO. |
| GEN_CMD_FULL | This bit indicates the full status of the generic command FIFO. |
| GEN_PLD_W_EMPTY | This bit indicates the empty status of the generic write payload FIFO. |
| GEN_PLD_W_FULL | This bit indicates the full status of the generic write payload FIFO. |
| GEN_PLD_R_EMPTY | This bit indicates the empty status of the generic read payload FIFO. |
| GEN_PLD_R_FULL | This bit indicates the full status of the generic read payload FIFO. |
| GEN_RD_CMD_BUSY | This bit is set when a read command is issued and cleared when the entire response is stored in the FIFO for Generic interface. |
| GEN_BUFF_CMD_EMPTY | This bit indicates the empty status of the generic command internal buffer. |
| GEN_BUFF_CMD_FULL | This bit indicates the full status of the generic command internal buffer. |
| GEN_BUFF_PLD_EMPTY | This bit indicates the empty status of the generic payload internal buffer. |
| GEN_BUFF_PLD_FULL | This bit indicates the full status of the generic payload internal buffer. |